Integrated Circuit for Subnanosecond Gating of InGaAs/InP SPAD

We present a novel integrated circuit for subnanosecond gating of InGaAs/InP single-photon avalanche diodes (SPADs). It enables the detector in well-defined time intervals (down to 500 ps) and strongly reduces the afterpulsing effect. It includes a fast pulser with rising/falling edge shorter than 300 ps (20%-80%), a wideband comparator and hold-off logic circuitry. The fast avalanche quenching reduces the charge flow in the SPAD, thus decreasing the afterpulsing, a detrimental effect that limits the maximum count rate of InGaAs/InP SPADs. The wideband SiGe comparator guarantees very low timing jitter of the acquired waveforms: <100 ps (FWHM) at 5 V excess bias voltage, when operated with InGaAs/InP SPAD, whereas we estimate that the time jitter of the circuit is < 30 ps

SPAD Figures of Merit for Photon-Counting, Photon-Timing, and Imaging Applications: A Review

Single-photon avalanche diodes (SPADs) emerged as the most suitable photodetectors for both single-photon counting and photon-timing applications. Different complementary metal-oxide-semiconductor (CMOS) devices have been reported in the literature, with quite different performance and some excelling in just few of them, but often at different operating conditions. In order to provide proper criteria for performance assessment, we present some figures of merit (FoMs) able to summarize the typical SPAD performance (i.e., photon detection efficiency, dark counting rate, afterpulsing probability, hold-off time, and timing jitter) and to identify a proper metric for SPAD comparisons, when used either as single-pixel detectors or in imaging arrays. The ultimate goal is not to define a ranking list of best-in-class detectors, but to quantitatively help the end-user to state the overall performance of different SPADs in either photon-counting, timing, or imaging applications. We review many CMOS SPADs from different research groups and companies, we compute the proposed FoMs for all them and, eventually, we provide an insight on present CMOS SPAD technologies and future trends

SPICE Electrical Models and Simulations of Silicon Photomultipliers

We present and discuss a comprehensive electrical model for Silicon Photomultipliers (SiPMs) based on a microcell able to accurately simulate the avalanche current build-up and the self-quenching of its Single-Photon Avalanche Diode (SPAD) “pixel” with series-connected quenching resistor. The entire SiPM is modeled either as an array of microcells, each one individually triggered by independent incoming photons, or as two macrocells, one with microcells all firing concurrently while the other one with all quiescent microcells; the most suitable approach depends on the light excitation conditions and on the dimension (i.e. number of microcells) of the overall SiPM. We validated both models by studying the behavior of SiPMs in different operating conditions, in order to study the effect of photons pile-up, the deterministic and statistical mismatches between microcells, the impact of the number of firing microcells vs. the total one, and the role of different microcell parameters on the overall SiPM performance. The electrical models were developed in SPICE and can simulate both custom-process and CMOS-compatible SiPMs, with either vertical or horizontal current-flow. The proposed simulation tools can benefit both SiPM users, e.g. for designing the best readout electronics, and SiPM designers, for assessing the impact of each parameter on the overall detection performance and electrical behavior

Planar CMOS analog SiPMs: design, modeling, and characterization

Silicon photomultipliers (SiPMs) are large area detectors consisting of an array of single-photon-sensitive microcells, which make SiPMs extremely attractive to substitute the photomultiplier tubes in many applications. We present the design, fabrication, and characterization of analog SiPMs in standard planar 0.35 μm CMOS technology, with about 1 mm × 1 mm total area and different kinds of microcells, based on single-photon avalanche diodes with 30 μm diameter reaching 21.0% fill-factor (FF), 50 μm diameter (FF = 58.3%) or 50 μm square active area with rounded corner of 5 μm radius (FF = 73.7%). We also developed the electrical SPICE model for CMOS SiPMs. Our CMOS SiPMs have 25 V breakdown voltage, in line with most commercial SiPMs and higher gain (8.8 × 106, 13.2 × 106, and 15.0 × 106, respectively). Although dark count rate density is slightly higher than state-of-the-art analog SiPMs, the proposed standard CMOS processing opens the feasibility of integration with active electronics, for switching hot pixels off, drastically reducing the overall dark count rate, or for further on-chip processing

Efecto del tiempo de superpulso de soldadura sobre la evolución microestructural de un acero de bajo carbono

El tipo de arco Súper Pulso fue desarrollado para proporcionar una solución a los cordones de pasada de raízde juntas a tope, en el proceso de soldadura semiautomático con protección gaseosa (GMAW). A diferenciade la soldadura por pulsos estándar, el Súper Pulso utiliza una secuencia de diferentes formas de onda de pulsopara crear una forma y aspecto de cordón similar al proceso GTAW. Utiliza alto amperaje en la fase primariapara mejorar la penetración y un bajo amperaje en la segunda fase para disminuir el calor aportado. Seutiliza la transferencia de spray en la fase primaria para mejorar la penetración y arco corto en la fase secundariapara enfriar el baño de soldadura dando menor transferencia de calor y menor distorsión al material debase. En la literatura hay poca información respecto a la relación entre las variables del Súper Pulso y lascaracterísticas microestructurales del metal depositado. El objetivo de este trabajo fue evaluar la influencia delos tiempos de cada fase en modo Súper Pulso, sobre las características geométricas del cordón y la solidificaciónen depósitos de soldadura de aceros con bajo contenido de carbono. Para tal fin, se soldaron cordonessobre una chapa IRAM - IAS U500 42 - F24 variando el tiempo de fases del Súper Pulso. Sobre cortes transversalesse determinó la geometría de los cordones y sobre cortes longitudinales la microestructura, las característicasde las zonas fundidas y afectadas. Resultados preliminares mostraron que la geometría del cordón yla solidificación estuvieron fuertemente influenciadas por los parámetros del pulso.Palabras claves: Soldadura pulsada, tiempos entre pulsos, acero al carbon

Single-Photon Avalanche Diodes in a 0.16 μm BCD Technology With Sharp Timing Response and Red-Enhanced Sensitivity

CMOS single-photon avalanche diodes (SPADs) have recently become an emerging imaging technology for applications requiring high sensitivity and high frame-rate in the visible and near-infrared range. However, a higher photon detection efficiency (PDE), particularly in the 700-950 nm range, is highly desirable for many growing markets, such as eye-safe three-dimensional imaging (LIDAR). In this paper, we report the design and characterization of SPADs fabricated in a 0.16 mu m BCD (Bipolar-CMOS-DMOS) technology. The overall detection performance is among the best reported in the literature: 1) PDE of 60% at 500 nm wavelength and still 12% at 800 nm; 2) very low dark count rate of < 0.2 cps/mu m(2) (in counts per second per unit area); 3) < 1% afterpulsing probability with 50 ns dead-time; and 4) temporal response with 30 ps full width at half-maximum and less than 50 ps diffusion tail time constant

Automotive Three-Dimensional Vision Through a Single-Photon Counting SPAD Camera

We present an optical 3-D ranging camera for automotive applications that is able to provide a centimeter depth resolution over a mbox{40}^{\circ} \times mbox{20}^{\circ} field of view up to 45 m with just 1.5 W of active illumination at 808 nm. The enabling technology we developed is based on a CMOS imager chip of 64 \times 32 pixels, each with a single-photon avalanche diode (SPAD) and three 9-bit digital counters, able to perform lock-in time-of-flight calculation of individual photons emitted by a laser illuminator, reflected by the objects in the scene, and eventually detected by the camera. Due to the SPAD single-photon sensitivity and the smart in-pixel processing, the camera provides state-of-the-art performance at both high frame rates and very low light levels without the need for scanning and with global shutter benefits. Furthermore, the CMOS process is automotive certified

Fully CMOS analog and digital SiPMs

Silicon Photomultipliers (SiPMs) are emerging single photon detectors used in many applications requiring large active area, photon-number resolving capability and immunity to magnetic fields. We present three families of analog SiPM fabricated in a reliable and cost-effective fully standard planar CMOS technology with a total photosensitive area of 1×1 mm2. These three families have different active areas with fill-factors (21%, 58.3%, 73.7%) comparable to those of commercial SiPM, which are developed in vertical (current flow) custom technologies. The peak photon detection efficiency in the near-UV tops at 38% (fill-factor included) comparable to commercial custom-process ones and dark count rate density is just a little higher than the best-in-class commercial analog SiPMs. Thanks to the CMOS processing, these new SiPMs can be integrated together with active components and electronics both within the microcell and on-chip, in order to act at the microcell level or to perform global pre-processing. We also report CMOS digital SiPMs in the same standard CMOS technology, based on microcells with digitalized processing, all integrated on-chip. This CMOS digital SiPMs has four 32×1 cells (128 microcells), each consisting of SPAD, active quenching circuit with adjustable dead time, digital control (to switch off noisy SPADs and readout position of detected photons), and fast trigger output signal. The achieved 20% fill-factor is still very good. © (2015) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only